The invention relates to a television circuit arrangement for field and line frequency doubling and picture part magnification, which circuit arrangement comprises a signal input for receiving information and a signal output for supplying information, first and second field memories which are arranged in parallel between the signal input and the signal output and are each provided with a signal input, a signal output and a clock signal input, a write/read circuit having a clock signal source and suitable for writing information during alternate field periods, each field period comprising line periods, into the first and the second field memory, respectively, in a field period as writing time at a given writing speed and for reading the information twice from the respective field memory during the following field period as reading time at a reading speed which is substantially twice the writing speed, which television circuit arrangement is further provided with a magnification control circuit for obtaining picture part magnification, this control circuit being coupled to the field memories.
A circuit arrangement of this kind has been described in an article in the Dutch magazine "Electronica" 1982, No. 4, on pages 27, 29, 31 and 33. In the article, in two figures on page 31, receiver designs with flicker reduction are shown, for which purpose field frequency doubling is utilized. To this end, the write/read circuit comprises microprocessor control, it being noted that the use thereof is particularly advantageous if additional effects are to be realized, such as, for example, electronic "zooming", i.e. picture part magnification. The article only states that this requires a complicated address calculation, while further data about the construction of the the required magnification control circuit are not given at all.